Method of barrier layer surface treatment to enable direct copper plating on barrier metal

ABSTRACT

Embodiments of a method of barrier layer surface treatment to enable direct copper plating without copper seed layer. In one embodiment, a method of plating copper on a substrate with a group VIII metal layer on top comprises pre-treating the substrate surface by removing a group VIII metal surface oxide layer and/or surface contaminants and plating copper on the pre-treated group VIII metal surface. Pre-treating the substrate can be accomplished by annealing the substrate in an environment with a hydrogen-containing gas environment and/or a non-reactive gas(es) to Ru, by a cathodic treatment in an acid-containing bath, or by immersing the substrate in an acid-containing bath

CROSS-REFERENCE TO OTHER APPLICATIONS

This application claims the benefit of U.S. provisional patentapplication serial No. 60/579,129, filed Jun. 10, 2004, which isincorporated herein by reference.

BACKGROUND OF THE DISCLOSURE

1. Field of the Invention

Embodiments of the invention generally relate to a method for barrierlayer surface treatment to enable direct copper plating on barriermetal.

2. Description of the Background Art

Sub-quarter micron, multi-level metallization is one of the keytechnologies for the next generation of very large scale integration(VLSI) and ultra large scale integration (ULSI) semiconductor devices.The multilevel interconnects that lie at the heart of this technologyrequire the filling of contacts, vias, lines, and other features formedin high aspect ratio apertures. Reliable formation of these features isvery important to the success of both VLSI and ULSI as well as to thecontinued effort to increase circuit density and quality on individualsubstrates and die.

As circuit densities increase, the widths of contacts, vias, lines andother features, as well as the dielectric materials between them, may bedecreased to less than about 65 nm, whereas the thickness of thedielectric layers remains substantially constant with the result thatthe aspect ratios for the features, i.e., their height divided by width,increase. Many conventional deposition processes do not consistentlyfill structures in which the aspect ratio exceeds 6:1, and particularlywhen the aspect ratio exceeds 10:1. As such, there is a great amount ofongoing effort being directed at the formation of void-free,nanometer-sized structures having high aspect ratios wherein the ratioof feature height to feature width could be 6:1 or higher.

Additionally, as the feature widths decrease, the device currenttypically remains constant or increases, which results in an increasedcurrent density for such features. Elemental aluminum and aluminumalloys have been the traditional metals used to form vias and lines insemiconductor devices because aluminum has a perceived low electricalresistivity, superior adhesion to most dielectric materials, and ease ofpatterning, and the aluminum in a highly pure form is readily available.However, aluminum has a higher electrical resistivity than other moreconductive metals, such as copper (Cu). Aluminum can also suffer fromelectromigration, leading to the formation of voids in the conductor.

Copper and copper alloys have lower resistivities than aluminum, as wellas a significantly higher electromigration resistance compared toaluminum. These characteristics are important for supporting the highercurrent densities experienced at high levels of integration andincreased device speed. Copper also has good thermal conductivity.Therefore, copper is becoming a choice metal for filling sub-quartermicron, high aspect ratio interconnect features on semiconductorsubstrates.

Conventionally, deposition techniques such as chemical vapor deposition(CVD) and physical vapor deposition (PVD) have been used to fill theseinterconnect features. However, as the interconnect sizes decrease andaspect ratios increase, void-free interconnect feature fill byconventional metallization techniques becomes increasingly difficultusing CVD and/or PVD. As a result thereof, plating techniques, such aselectrochemical plating (ECP), have emerged as viable processes forfilling sub-quarter micron sized high aspect ratio interconnect featuresin integrated circuit manufacturing processes.

Most ECP processes are generally two-stage processes, wherein a seedlayer is first formed over the surface of features on the substrate(this process may be performed in a separate system), and then thesurface of the features is exposed to an electrolyte solution while anelectrical bias is simultaneously applied between the substrate surfaceand an anode positioned within the electrolyte solution.

Conventional plating practices include depositing a copper seed layer byphysical vapor deposition (PVD), chemical vapor deposition (CVD), oratomic layer deposition (ALD) onto a diffusion barrier layer (e.g.,tantalum or tantalum nitride). However, as the feature sizes becomesmaller, it becomes difficult to have adequate seed step coverage withPVD techniques, as discontinuous islands of copper agglomerates areoften obtained in the feature side walls close to the feature bottom.When using a CVD or ALD deposition process in place of PVD to deposit acontinuous sidewall layer throughout the depth of the high aspect ratiofeatures, a thick copper layer is formed over the field. The thickcopper layer on the field can cause the throat of the feature to closebefore the feature sidewalls are completely covered. When the depositionthickness on the field is reduced to prevent throat closure, ALD and CVDtechniques are also prone to generate discontinuities in the seed layer.These discontinuities in the seed layer have been shown to cause platingdefects in the layers plated over the seed layer. In addition, coppertends to oxidize readily in the atmosphere and copper oxide readilydissolves in the plating solution. To prevent complete dissolution ofcopper in the features, the copper seed layer is usually made relativelythick (as high as 800 Å), which can inhibit the plating process fromfilling the features. Therefore, it is desirable to have a copperplating process that allows direct electroplating of copper on thinbarrier layer(s) without a copper seed layer.

Therefore, there is a need for a copper plating process that can fillfeatures and does not require a copper seed layer.

SUMMARY OF THE INVENTION

Embodiments of the invention generally provide a method of barrier layersurface treatment to enable direct copper plating without copper seedlayer. In one embodiment, a method of directly plating copper on asubstrate with a group VIII metal layer on the substrate surfacecomprises pre-treating the substrate surface to remove a group VIIImetal surface oxide layer and/or organic surface contaminants on thesubstrate surface to reduce a critical current density during plating,and plating a continuous and void-free copper layer on the pre-treatedsubstrate surface in an acidic plating bath with a plating currentdensity equaling to or greater than the critical current density.

In another embodiment, a method of directly plating copper on asubstrate with a group VIII metal layer on the substrate surfacecomprises pre-treating the substrate surface by annealing the substratein an environment with a hydrogen-containing gas and/or a gas(es)non-reactive to group VIII metal to reduce a critical current densityduring plating, and plating a continuous and void-free copper layer onthe pre-treated substrate surface in an acidic plating bath with aplating current density equaling to or greater than the critical currentdensity.

In another embodiment, a method of directly plating copper on asubstrate with a group VIII metal layer on the substrate surfacecomprises pre-treating the substrate surface by annealing the substratein an environment with a hydrogen-containing gas and/or a gas(es)non-reactive to group VIII metal to reduce a critical current densityduring plating, and plating a continuous and void-free copper layer onthe pre-treated substrate surface in an acidic plating bath with aplating current density equaling to or greater than the critical currentdensity within 4 hours after the pre-treatment.

In another embodiment, a method of directly plating copper on asubstrate with a group VIII metal layer on the substrate surfacecomprises pre-treating the substrate surface to remove a group VIIImetal surface oxide layer and/or organic surface contaminants on thesubstrate surface to reduce a critical current density during plating tobelow 10 mA/cm², and plating a continuous and void-free copper layer onthe pre-treated substrate surface in an acidic plating bath with aplating current density equaling to or greater than the critical currentdensity.

In yet another embodiment, a method of directly plating copper on asubstrate with a group VIII metal layer on the substrate surfacecomprises pre-treating the substrate surface with a reducing agent toremove a group VIII metal surface oxide layer and/or organic surfacecontaminants on the substrate surface to reduce a critical currentdensity during plating, and plating a continuous and void-free copperlayer on the pre-treated substrate surface in an acidic plating bathwith a plating current density equaling to or greater than the criticalcurrent density.

BRIEF DESCRIPTION OF THE DRAWINGS

The teachings of the present invention can be readily understood byconsidering the following detailed description in conjunction with theaccompanying drawings, in which:

FIGS. 1A-1C illustrate schematic cross-sectional views of an integratedcircuit fabrication sequence.

FIG. 2 shows the critical current density as a function of sulfuric acidconcentration.

FIG. 3A shows the process flow of pre-treating a substrate surfacebefore copper plating.

FIG. 3B shows the critical current density as a function of sulfuricacid concentration for as-deposited and annealed Ru substrates.

FIG. 4 shows the SEM of copper plated on annealed Ru surface in 0.14μm×0.8 μm trenches.

FIG. 5 is a top plan view of one embodiment of an electrochemicalplating system.

FIG. 6 illustrates an exemplary embodiment of a plating cell used in theelectrochemical plating cell of the invention.

To facilitate understanding, identical reference numerals have beenused, where possible, to designate identical elements that are common tothe figures. The drawings are not to scale.

DETAILED DESCRIPTION

Ruthenium (Ru) thin films, deposited by CVD, ALD or PVD, can be apotential candidate for a seedless diffusion barrier between intermetaldielectric (IMD) and copper interconnect for ≦45 nm technology.Ruthenium is a group VIII metal that has low electrical resistivity(resistivity ˜7 μΩ-cm) and high thermal stability (high melting point˜2300° C.). It is relatively stable even in the presence of oxygen andwater at ambient temperature. The thermal and electrical conductivitiesof Ru are twice those of Tantalum (Ta). Ruthenium also does not form analloy with copper below 900° C. and shows good adhesion to copper.Therefore, the semiconductor industry has shown an interest in using Ruas a copper barrier layer. The low resistivity of Ru can be an advantagewhen trying to fill ruthenium coated features with copper without a seedlayer.

FIGS. 1A-1C illustrate cross-sectional views of a substrate at differentstages of a copper interconnect fabrication sequence incorporating agroup VIII metal barrier layer of the present invention. FIG. 1A, forexample, illustrates a cross-sectional view of a substrate 100 havingmetal contacts 104 and a dielectric layer 102 formed thereon. Thesubstrate 100 may comprise a semiconductor material such as, forexample, silicon, germanium, or gallium arsenide. The dielectric layer102 may comprise an insulating material such as, silicon dioxide,silicon nitride, silicon oxynitride and/or carbon-doped silicon oxides,such as SiO_(x)C_(y), for example, BLACK DIAMOND™ low-k dielectric,available from Applied Materials, Inc., located in Santa Clara, Calif.The metal contacts 104 may comprise for example, copper, among others.Apertures 120 may be defined in the dielectric layer 102 to provideopenings over the metal contacts 104. The apertures 120 may be definedin the dielectric layer 102 using conventional lithography and etchingtechniques. The width of apertures 120 could be equal to or less thanabout 900 Å. The thickness of dielectric layer 102 could be in the rangebetween about 1000 Å to about 10000 Å.

In one embodiment, a barrier layer 106 may be formed in the apertures120 defined in the dielectric layer 102. The optional barrier layer 106may include one or more refractory metal-containing layers used as acopper-barrier material such as, for example, titanium, titaniumnitride, titanium silicon nitride, tantalum, tantalum nitride, tantalumsilicon nitride, tungsten and tungsten nitride, among others. Theoptional barrier layer 106 may be formed using a suitable depositionprocess, such as ALD, chemical vapor deposition (CVD) or physical vapordeposition (PVD). For example, titanium nitride may be deposited using aCVD process or an ALD process wherein titanium tetrachloride and ammoniaare reacted. In one embodiment, tantalum and/or tantalum nitride isdeposited as a barrier layer by an ALD process as described in commonlyassigned United States Patent Publication 20030121608, published Jul. 3,2003, and is herein incorporated by reference. The thickness of theoptional barrier layer is between about 5 Å to about 150 Å andpreferably less than 100 Å.

In one embodiment, a thin film of group VIII metal, such as ruthenium(Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), andplatinum (Pt), may be used as an underlayer (or barrier layer) for thecopper vias and lines. Such group VIII metal, which is resistant tocorrosion and oxidation, may provide a surface upon which a copper layeris subsequently deposited using an electrochemical plating (ECP)process. The group VIII metal acts as a copper-barrier layer. The groupVIII metal can also be deposited on the conventional barrier layer, suchas Ta (tantalum) and/or TaN (tantalum nitride), to serve as a glue layerbetween the conventional barrier layer and copper. The group VIII metalis typically deposited using a chemical vapor deposition (CVD) process,atomic layer deposition (ALD) or a physical vapor deposition (PVD)process.

Referring to FIG. 1B, a group VIII barrier metal layer 108, such asruthenium (Ru), is formed on the substrate, and in this example on theoptional barrier layer 106. The thickness for the group VIII metal layer108 often depends on the device structure to be fabricated. Typically,the thickness of the group VIII metal layer 108, such as ruthenium (Ru),is less than about 1,000 Å, preferably between about 5 Å to about 200 Å.In one embodiment, the group VIII metal layer 108 is a ruthenium layerhaving a thickness less than about 100 Å, for example, about 50 Å.

Thereafter, referring to FIG. 1C, the apertures 120 may be filled withcopper 110 to complete the copper interconnect. In one embodiment, thenoble or transitional metal layer, such as ruthenium layer, serves as aseed layer to which a copper is directly deposited using an ECP or othercopper plating techniques. The electrochemical plating solution for ECPgenerally includes a copper source, an acid source, a chlorine ionsource, and at least one plating solution additive, i.e., levelers,suppressors, accelerators, antifoaming agents, etc. For example, theplating solution may contain between about 30 g/l and about 60 g/l ofCu, between about 10 g/l to about 50 g/l of sulfuric acid, between about20 and about 100 ppm of Cl ions, between about 5 and about 30 ppm of anadditive accelerator, between about 100 and about 1000 ppm of anadditive suppressor, and between about 1 and about 6 ml/l of an additiveleveler. The plating current may be in the range from about 2 mA/cm² toabout 10 mA/cm² for filling copper into the submicron trench and/or viastructures. Examples of copper plating chemistries and processes can befound in commonly assigned U.S. patent application Ser. No. 10/616,097,titled “Multiple-Step Electrodeposition Process For Direct CopperPlating On Barrier Metals”, filed on Jul. 8, 2003, and U.S. patentapplication No. 60/510,190, titled “Methods And Chemistry For ProvidingInitial Conformal Electrochemical Deposition Of Copper In Sub-MicronFeatures”, filed on Oct. 10, 2003. An example of an electro-chemicalplating (ECP) system and an exemplary plating cell are described inFIGS. 5-6 below.

It has been found that conventional copper plating processes for using10-50 g/l of H₂SO₄, and plating current density of 2-10 mA/cm² will notresult in a thin continuous copper film (≦1000 Å) deposition on a Rulayer. A continuous copper film is formed on Ru when the plating currentdensity and/or concentration of H₂SO₄ (or acidity) are increased beyondthe values used in conventional copper plating. A minimum or criticalcurrent density (CCD) has been found where plating current densitiesequal to or above this value will form a thin continuous copper film ona Ru layer and current densities below this value will not form a thincontinuous film on the Ru layer. The magnitude of the CCD is stronglydependent on the acidity of the plating solution.

FIG. 2 illustrates an example of the critical current density (CCD)versus sulfuric acid (H₂SO₄) concentration. The CCD, as shown in FIG. 2,is defined as the minimum current density required to form a 1000 Åcontinuous copper film on a Ru surface. Below the CCD, no visually shinycontinuous copper film will be deposited at the center regions of thesubstrate. While the magnitude of CCD strongly depends on the aciditylevel of the plating bath, the CCD is independent of the Ru depositionmethod (either ALD, CVD or PVD).

It is well known that the kinetics of nucleation and crystal growth forelectro-deposition is intimately related to the local electrochemicalover-potential at the nucleation/growth sites. Over-potential is definedas the difference between the actual potential and the zero-current(open-circuit) potential. A high over-potential favors new crystalnucleation by lowering the critical nucleus size and increasing thedensity of nuclei, while a low electrochemical over-potential favorsgrowth on existing crystallites. Further, the existence ofsulfur-containing organic additives (e.g., accelerator) in the platingsolution is believed to enhance the surface diffusion of Cu adatoms andthus promote crystal growth at the expense of nucleation. Cu adatoms arecopper atoms that land on the substrate surface during plating andbefore they are incorporated into the Cu film. Since the plating currentdensity depends on the electrochemical over-potential for a given bath,the copper deposit structure/morphology is therefore affected by theplating current density. Scanning electron microscopic (SEM) pictures,taken near the center of a substrate having an 1000 Å (measured near theedge of the substrate) copper film plated on an 100 Å Ru film in a 10g/l sulfuric acid containing plating solution at a 3 mA/cm² platingcurrent, was found to have large crystallites and poor film depositionin the center region of the substrate. The 100 Å thick Ru film wasdeposited by PVD. According to the results shown in FIG. 2, the CCD isabout 40 mA/cm² when the sulfuric acid concentration is 10 g/l. Thecurrent density of 3 mA/cm² is much lower than 40 mA/cm² (CCD) and thusas expected a non-continuous layer was formed. It is believed that underthis plating condition, only a few crystallites are stable enough toserve as the nucleation center for further crystal growth, and thus theenergy from the plating current is primarily used in growing thesecrystals, with the help of fast copper adatom surface diffusion.Therefore, the SEM shows large crystallites and Cu island deposition inthe center region of the substrate. To form a continuous copper filmacross the entire substrate under this condition, the deposited layerwould have to be very thick and the deposited layer would likely containvoids, which would make it unsuitable for Cu interconnect applications.It has been found that a substrate that has a 5000 Å thick continuouscopper film can be formed on a Ru (100 Å thick and deposited by PVD)film, using a plating solution that contained 60 g/l of H₂SO₄ and aplating current density of about 10 mA/cm² (slightly lower than the CCDof 15 mA/cm²). However, there were large voids at the copper/Ruinterface.

When the plating current was increased to 30 mA/cm², the density of thecrystallites was found to increase and the sizes of the crystallites wasfound to decrease near the center of the substrate. However, nocontinuous copper film was formed on Ru surface since the platingcurrent was below the CCD. As before, the Ru film was 100 Å thick andwas deposited by PVD.

There are also disadvantages in increasing plating current. Generally, ahigh plating current density tends to result in poor gapfill. Generally,plating current densities of less than about 10 mA/cm² have been foundto encourage bottom-up gapfill. In order to reduce the plating currentdensity to the range suitable for bottom-up gapfill, the concentrationof sulfuric acid needs to be increased. When the sulfuric acidconcentration is raised to 160 g/l and the plating current is at 5mA/cm², which is equal to the CCD at the particular acidicconcentration, a continuous 1000 Å copper film was formed across a 100 ÅRu film on a substrate. However, cross-section SEM pictures show thatvoids were formed at the copper/Ru interface. When the plating currentwas raised to 10 mA/cm² (2 times CCD of 5 mA/cm²) and the sulfuric acidconcentration was maintained at 160 g/l, a continuous 5000 Å copper filmwas formed on a 100 Å Ru layer with no voids at the copper/Ru interface.

One of the reasons for the CCD dependence on bath acidity is related tothe local electrochemical over-potential discussed above. Platingsolution with low acidity has higher resistance. Therefore, higher CCDis needed to overcome the higher resistance in a plating bath with lowacidity.

Recent research presented by Chyan et. al. from University of NorthTexas in American Chemical Society National Meeting in New Orleans, La.,held in March 23^(rd) to Mar. 27, 2003, shows that ruthenium oxide(RuO₂) has a metal-like conductivity, and copper also plates and adheresstrongly to ruthenium oxide. The high CCDs observed on as-deposited Rusurface could be a result of Ru surface oxidation and/or the existenceof organic surface contaminants. The “pure” Ru surface is suspected tobe more active for Cu nucleation. Removing the surface oxide layer ororganic surface contaminants by a pre-treatment process before copperplating could greatly reduce the plating current and the plating bathacidity required to form a continuous copper layer without copper/Ruinterface voids. The pre-treatment process could be exposing thesubstrate surface to a reducing agent. FIG. 3A shows the pre-treatmentprocess flow. In step 301, the substrate with a group VIII metal, suchas Ru, on top is pre-treated by a process, such as annealing in areducing gas (e.g. hydrogen gas), to clean the surface of metal oxide ororganic contaminants. At step 302, a copper film is directly plated onthe pre-treated substrate. One possible oxide reduction reaction isshown in equation (1) below.RuO₂+2 H₂→Ru+2 H₂O   (1)

A substrate with 100 Å PVD Ru film is pre-treated by annealing justprior to Cu plating. The annealing process is performed in the presenceof a hydrogen-containing gas, such as a forming gas, which contains 4%H₂ and 96% N₂, at a temperature between about room temperature to about400° C., preferably between about 100° C. to about 400° C., a gas flowrate between about 1 sccm to about 20 slm, and under about 5 mTorr toabout 1500 Torr for about 2 seconds to about 5 hours. The annealing timeis preferably within 1 hour for manufacturing efficiency. The purpose ofthe substrate annealing is either to reduce the RuO₂ surface back to Ruand/or to desorb the organic surface contaminants. In one embodiment,the hydrogen-containing gas is mixed with non-reactive gases, such as N₂or inert gases (e.g. Ar, He, etc.). For the purpose of desorbing organicsurface contaminants, annealing with a non-reactive gas to Ru, such asN₂ or inert gas (e.g., Ar), can be used. The annealing process can beperformed in a single-wafer rapid thermal annealing chamber, availablefrom Applied Materials in Santa Clara, Calif., or in a batch furnace.

FIG. 3B illustrates an example of where the magnitude of the CCD wasreduced after the as-deposited Ru substrate was annealed in the forminggas at 270° C. for 30 seconds in an anneal chamber described in FIG. 5below. Curve 311 shows the CCD for copper plating on an as-deposited Rusubstrate surface. Curve 312 shows the much reduced CCD for copperplating on a forming gas annealed Ru substrate surface. For example, theCCD for a solution containing 10 g/l of H₂SO₄ lowered the CCD from 40mA/cm² to 8 mA/cm² and a plating solution containing 100 g/l of H₂SO₄lowered the CCD from 10 mA/cm² to 3 mA/cm². Both curves 311 and 312 showthat CCD decreases with the increase of acid concentration. The acidused in the plating solution could be other types of acids, such assulfonic acid (including alkane sulfonic acids). If another type of acidis used, instead of sulfuric acid, the equivalent acid concentrationrange should be used.

With the forming gas anneal, the direct copper plating process can beoperated at similar current densities as the conventional copper platingprocess. After the forming gas anneal, the Ru substrate surface tends tobecome more hydrophilic, as is expected for a clean and pure Ru surface.Cu plating onto the forming-gas annealed Ru films must be performedwithin 4 hours and preferably within 2 hours, following the forming-gasanneal, in order to maintain the large reduction in CCD. If thesubstrate is exposed to the oxygen or other contaminants for too long,the CCD will gradually go back to the pre-anneal state due toreformation of RuO_(x) or re-deposition of organic surface contaminantsfrom ambient atmosphere.

The large reduction of CCD caused by the hydrogen-containing gas annealis very important, since the reduction in CCD allows a Cu film to bedeposited at current densities suitable for gapfill into submicrontrench/via structures using acidic CuSO₄ baths containing all practicalacid concentrations in the range from about 10 g/l to about 300 g/l.

In one example, SEM pictures taken of a deposited 1000 Å copper film onannealed 80 Å ALD Ru, using a plating solution containing a sulfuricacid concentration of 100 g/l and a plating current density (PCD) of 3mA/cm² (equal to the CCD, PCD/CCD=1), showed that a continuous copperfilm was deposited with no voids between the copper/Ru interface. Novoids between the copper/Ru interface is an indication of good copper(Cu) and Ru interface integrity and good adhesion of Cu on the annealedRu surface. In a second example, SEM pictures taken of a deposited 1000Å copper film on annealed 80 Å ALD Ru, using a plating solutioncontaining a sulfuric acid concentration of 100 g/l and a platingcurrent density of 4.5 mA/cm² (or PCD/CCD=1.5), also showed that acontinuous copper film was deposited with no voids between the copper/Ruinterface. Similarly, plating current density of 7.5 mA/cm² (orPCD/CCD=2.5), also achieved a continuous copper film with no voidsbetween the copper/Ru interface. These results show that gas annealpre-treatment lowers the plating current density and improves the Ru/Cuinterface adhesion and integrity.

The copper/Ru interface shows good integrity without voids even whenPCD/CCD equals to 1 when Cu is deposited on forming-gas annealed Rusurface. In contrast, when plating at the CCD (or PCD/CCD=1), theinterface between copper and an un-annealed Ru surface will developinterfacial voids as described earlier. A clean Ru surface allows bettercopper nucleation and deposition and therefore the interface integrityis improved.

Another benefit of pre-treating the group VIII metal surface withhydrogen-containing gas anneal is the improved adhesion between copperand the group VIII metal. Experimental results have shown that theadhesion is better between Cu and the pre-treated, clean and possiblyoxide free, Ru surface due to good copper/Ru interface integrity (novoids). Good interface integrity between the Cu and the Ru layers can bean important aspect in forming a reliable semiconductor device.Obviously, having a pre-treated Ru surface is critical to achieve highquality Cu deposition on Ru films.

Another aspect of Cu plating onto a forming-gas annealed Ru surface isthe full substrate surface coverage by the plated Cu film due to theimproved hydrophilicity mentioned above. The step coverage of copperplating on the substrate features should also improve since the annealedRu surface is more hydrophilic and is more able to draw the platingsolution deep into the features. FIG. 4 shows the SEM of excellentgapfill of plated copper on an annealed Ru surface in 0.14 μm×0.8 μmtrenches. The as-deposited Ru is an 80 Å ALD Ru. The pre-treatment is aforming gas anneal at 300° C. for 3 minutes. The copper plating currentis 10 mA/cm² for the first 100 Å and 5 mA/cm² for the remaining 1900 Å.

The annealing process can be performed in an integrated annealingchamber, such as annealing chamber 535 in FIG. 5, or in a separateannealing system. The annealing process can be performed in either asingle-wafer chamber or a batch furnace.

In addition to the annealing with hydrogen-containing gas, the surfacepre-treatment of the group VIII metal prior to direct copper plating canalso be accomplished by other methods. One example of anotherpre-treatment method is a cathodic treatment in a copper-ion-free acidsolution. The surface RuO_(x) film can be cathodically reduced and theweakly-bound organic surface contaminants can be expelled from thesurface by the cathodic polarization. One possible reduction reaction isshown in equation (2) below. The cathodic treatment can be performed inan integrated cell similar to the copper plating cell, as describedbelow in association with FIG. 6, or in a treatment cell separated fromthe copper plating system. The cathodic treatment cell requires ananode, a cathode and a copper-ion-free acid bath. The acidicconcentration range should be in the range between about 10 g/l to about100 g/l, and preferably in the range between about 10 g/l to about 50g/l. A preferred acid is H₂SO₄, but other types of acidic solutions,such as organic sulfonic acid solutions (e.g. methylsulfonic acid), canalso be used. The acidic bath needs to be free of copper to preventcopper deposition, which would be poorly nucleated copper islands, on Ruduring the cathodic treatment.RuO₂+4 H*+4e ⁻→Ru+2 H₂O   (2)

The cathodic treatment can be realized through potential control orcurrent control. With the potential control approach, a referenceelectrode is needed to monitor the wafer potential, in addition to theworking electrodes, which are the thin as-deposited Ru film on the wafersurface, and an anode. The preferred reference electrode is a thincopper wire placed close to the substrate surface. The potential controlcan be realized through a potentiostat. The controlled Ru electrodepotential, with respect to the copper reference electrode, is in therange of about 0 volt to about −0.5 volt. In addition to RuO_(x)reduction to Ru, H₂ evolution could occur on the Ru film surface. Withthe current control approach, a cathodic current will be passed betweenthe substrate with as-deposited Ru and an anode. The current densityshould be in the range of about 0.05 mA/cm² to about 1 mA/cm². Thetreatment time should be in the range of about 2 seconds to about 30minutes. However, for throughput concern, the treatment is preferablykept below 5 minutes.

The experimental results and discussion related to Ru is merely used asexamples. The inventive concept can be applied to other group VIIImetals, such as rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir),and platinum (Pt).

Copper plating can be performed within a cell on the Electra Cu ECP®system or the SlimCell Copper Plating system, both of which areavailable from Applied Materials, Inc. of Santa Clara, Calif. FIG. 5illustrates a top plan view of a SlimCell Copper Plating system 500. ECPsystem 500 includes a factory interface (FI) 530, which is alsogenerally termed a substrate loading station. Factory interface 530includes a plurality of substrate loading stations configured tointerface with substrate containing cassettes 534. A robot 532 ispositioned in factory interface 530 and is configured to accesssubstrates contained in the cassettes 534. Further, robot 532 alsoextends into a link tunnel 515 that connects factory interface 530 toprocessing mainframe or platform 513. The position of robot 532 allowsthe robot to access substrate cassettes 534 to retrieve substratestherefrom and then deliver the substrates to one of the processing cells514, 516 positioned on the mainframe 513, or alternatively, to theannealing station 535. Similarly, robot 532 may be used to retrievesubstrates from the processing cells 514, 516 or the annealing chamber535 after a substrate processing sequence is complete. In this situationrobot 532 may deliver the substrate back to one of the cassettes 534 forremoval from system 500.

The anneal station 535, which will be further discussed herein,generally includes a two position annealing chamber, wherein a coolingplate/position 536 and a heating plate/position 537 are positionedadjacently with a substrate transfer robot 540 positioned proximatethereto, e.g., between the two stations. The robot 540 is generallyconfigured to move substrates between the respective heating plate 537and cooling plate 536. Further, although the anneal chamber 535 isillustrated as being positioned such that it is accessed from the linktunnel 515, embodiments of the invention are not limited to anyparticular configuration or placement. In one embodiment, the annealstation 535 may be positioned in direct communication with the mainframe513, i.e., accessed by mainframe robot 520. For example, as illustratedin FIG. 5, the anneal station 535 may be positioned in directcommunication with the link tunnel 515, which allows for access tomainframe 513, and as such, the anneal chamber 535 is illustrated asbeing in communication with the mainframe 513. Details of a suitableannealing chamber are described in commonly assigned U.S. patentapplication No. 60/463,860, titled “Two Position Anneal Chamber”, filedon Apr. 18, 2003.

In one embodiment, the annealing process is performed in an integratedannealing chamber, as shown as annealing chamber 535 in FIG. 5. Inanother embodiment, the annealing process is performed in a separateannealing system. In other embodiments, the annealing process isperformed in a single-wafer chamber or a batch furnace.

As mentioned above, ECP system 500 also includes a processing mainframe513 having a substrate transfer robot 520 centrally positioned thereon.Robot 520 generally includes one or more arms/blades 522, 524 configuredto support and transfer substrates thereon. Additionally, the robot 520and the accompanying blades 522, 524 are generally configured to extend,rotate, and vertically move so that the robot 520 may insert and removesubstrates to and from a plurality of processing locations 502, 504,506, 508, 510, 512, 514, 516 positioned on the mainframe 513. Similarly,factory interface robot 532 also includes the ability to rotate, extend,and vertically move its substrate support blade, while also allowing forlinear travel along the robot track that extends from the factoryinterface 530 to the mainframe 513. Generally, process locations 502,504, 506, 508, 510, 512, 514, 516 may be any number of processing cellsutilized in an electrochemical plating platform. More particularly, theprocess locations may be configured as electrochemical plating cells,rinsing cells, bevel clean cells, spin rinse dry cells, substratesurface cleaning cells (which collectively includes cleaning, rinsing,and etching cells), electroless plating cells, metrology inspectionstations, and/or other processing cells that may be beneficially used inconjunction with a plating platform. Each of the respective processingcells and robots are generally in communication with a processcontroller 511, which may be a microprocessor-based control systemconfigured to receive inputs from both a user and/or various sensorspositioned on the system 500 and appropriately control the operation ofsystem 500 in accordance with the inputs.

FIG. 6 illustrates a partial perspective and sectional view of anexemplary plating cell 600 that may be implemented in processinglocations 502, 504, 506, 508, 510, 512, 514, 516 of FIG. 5. Theelectrochemical plating cell 600 generally includes an outer basin 601and an inner basin 602 positioned within outer basin 601. Inner basin602 is generally configured to contain a plating solution that is usedto plate a metal, e.g., copper, onto a substrate during anelectrochemical plating process. During the plating process, the platingsolution is generally continuously supplied to inner basin 602 (at about1 gallon per minute for a 10 liter plating cell, for example), andtherefore, the plating solution continually overflows the uppermostpoint (generally termed a “weir”) of inner basin 602 and is collected byouter basin 601 and drained therefrom for chemical management andrecirculation. Plating cell 600 is generally positioned at a tilt angle,i.e., the frame portion 603 of plating cell 600 is generally elevated onone side such that the components of plating cell 600 are tilted betweenabout 3° and about 30°, or generally between about 4° and about 10° foroptimal results. The frame member 603 of plating cell 600 supports anannular base member on an upper portion thereof. Since frame member 603is elevated on one side, the upper surface of base member 604 isgenerally tilted from the horizontal at an angle that corresponds to theangle of frame member 603 relative to a horizontal position. Base member604 includes an annular or disk shaped recess formed into a centralportion thereof, the annular recess being configured to receive a diskshaped anode member 605. Base member 604 further includes a plurality offluid inlets/drains 609 extending from a lower surface thereof. Each ofthe fluid inlets/drains 609 are generally configured to individuallysupply or drain a fluid to or from either the anode compartment or thecathode compartment of plating cell 600. Anode member 605 generallyincludes a plurality of slots 607 formed therethrough, wherein the slots607 are generally positioned in parallel orientation with each otheracross the surface of the anode 605. The parallel orientation allows fordense fluids generated at the anode surface to flow downwardly acrossthe anode surface and into one of the slots 607. Plating cell 600further includes a membrane support assembly 606. Membrane supportassembly 606 is generally secured at an outer periphery thereof to basemember 604, and includes an interior region configured to allow fluidsto pass therethrough. A membrane 608 is stretched across the support 606and operates to fluidly separate a catholyte chamber and anolyte chamberportions of the plating cell. The membrane support assembly may includean o-ring type seal positioned near a perimeter of the membrane, whereinthe seal is configured to prevent fluids from traveling from one side ofthe membrane secured on the membrane support 606 to the other side ofthe membrane. A diffusion plate 610, which is generally a porous ceramicdisk member and is configured to generate a substantially laminar flowor even flow of fluid in the direction of the substrate being plated, ispositioned in the cell between membrane 608 and the substrate beingplated. The exemplary plating cell is further illustrated in commonlyassigned U.S. patent application Ser. No. 10/268,284, which was filed onOct. 9, 2002 under the title “Electrochemical Processing Cell”, claimingpriority to U.S. Provisional Application Ser. No. 60/398,345, which wasfiled on Jul. 24, 2002, both of which are incorporated herein byreference in their entireties.

Although several preferred embodiments which incorporate the teachingsof the present invention have been shown and described in detail, thoseskilled in the art can readily devise many other varied embodiments thatstill incorporate these teachings.

1. A method of directly plating copper on a substrate with a group VIII metal layer on the substrate surface, comprising: pre-treating the substrate surface to remove a group VIII metal surface oxide layer and/or organic surface contaminants on the substrate surface to reduce a critical current density during plating; and plating a continuous and void-free copper layer on the pre-treated substrate surface in an acidic plating bath with a plating current density equaling to or greater than the critical current density.
 2. The method of claim 1, wherein the group VIII metal is selected from the group of ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), and platinum (Pt).
 3. The method of claim 2, wherein the group VIII metal is ruthenium (Ru).
 4. The method of claim 1, wherein the thickness of the group VIII metal is less than about 1000 Å.
 5. The method of claim 4, wherein the thickness of the group VIII metal is between about 5 Å to about 200 Å.
 6. The method of claim 1, wherein the copper plating is performed within 4 hours after the pre-treatment.
 7. The method of claim 1, wherein the critical current density decreases with the increase of the acidity of the plating bath.
 8. The method of claim 1, wherein the acidity in the acidic plating bath comes from sulfuric acid, whose concentration is in the range between about 10 g/l to about 300 g/l.
 9. The method of claim 8, wherein the critical current density is less than 10 mA/cm².
 10. The method of claim 1, wherein the gap group VIII metal surface is more hydrophilic due to the surface pre-treatment.
 11. The method of claim 1, wherein pre-treating the substrate is accomplished by annealing the substrate in an environment with a hydrogen-containing gas and/or a gas(es) non-reactive to group VIII metal.
 12. The method of claim 11, wherein the annealing gas is a forming gas that contains 4% hydrogen and 96% nitrogen.
 13. The method of claim 11, wherein the gas flow rate is between about 1 sccm to about 20 slm.
 14. The method of claim 11, wherein the annealing temperature is between about 100° C. to about 400° C.
 15. The method of claim 11, wherein the annealing pressure is between about 5 mTorr to about 1500 Torr.
 16. The method of claim 11, wherein the annealing duration is between about 2 seconds to about 5 hours.
 17. The method of claim 1, wherein the substrate is pre-treated for less than about 1 hour.
 18. The method of claim 1, wherein the pre-treatment is performed in an integrated single wafer annealing chamber.
 19. The method of claim 11, wherein the pre-treatment is performed in an annealing furnace.
 20. The method of claim 1, wherein pre-treating the substrate is accomplished by a cathodic treatment in an acid-containing bath.
 21. The method of claim 20, wherein the acid-containing bath has an about 10 g/l to about 100 g/l acid concentration.
 22. The method of claim 20, wherein the cathodic is performed at a potential in the range of about 0 volt to about −0.5 volt or at a current density in the range of about 0.05 mA/cm² to about 1 mA/cm².
 23. The method of claim 20, wherein the pre-treatment duration is in the range of about 2 seconds to about 30 minutes.
 24. The method of claim 23, wherein the substrate is pre-treated for less than 5 minutes.
 25. The method of claim 20, wherein the acid-containing bath contains sulfuric acid.
 26. The method of claim 20, wherein the acid concentration is in the range between 10 g/l to about 50 g/l.
 27. The method of claim 20, wherein the acid-containing bath is integrated with the copper plating system.
 28. The method of claim 1, wherein the initial plating current of plating copper on the pre-treated group VIII metal surface is at least equal to the critical current density.
 29. A method of directly plating copper on a substrate with a group VIII metal layer on the substrate surface, comprising: pre-treating the substrate surface by annealing the substrate in an environment with a hydrogen-containing gas and/or a gas(es) non-reactive to group VIII metal to reduce a critical current density during plating; and plating a continuous and void-free copper layer on the pre-treated substrate surface in an acidic plating bath with a plating current density equaling to or greater than the critical current density.
 30. A method of directly plating copper on a substrate with a group VIII metal layer on the substrate surface, comprising: pre-treating the substrate surface by annealing the substrate in an environment with a hydrogen-containing gas and/or a gas(es) non-reactive to group VIII metal to reduce a critical current density during plating; and plating a continuous and void-free copper layer on the pre-treated substrate surface in an acidic plating bath with a plating current density equaling to or greater than the critical current density within 4 hours after the pre-treatment.
 31. A method of directly plating copper on a substrate with a group VIII metal layer on the substrate surface, comprising: pre-treating the substrate surface to remove a group VIII metal surface oxide layer and/or organic surface contaminants on the substrate surface to reduce a critical current density during plating to below 10 mA/cm²; and plating a continuous and void-free copper layer on the pre-treated substrate surface in an acidic plating bath with a plating current density equaling to or greater than the critical current density.
 32. A method of directly plating copper on a substrate with a group VIII metal layer on the substrate surface, comprising: pre-treating the substrate surface with a reducing agent to remove a group VIII metal surface oxide layer and/or organic surface contaminants on the substrate surface to reduce a critical current density during plating; and plating a continuous and void-free copper layer on the pre-treated substrate surface in an acidic plating bath with a plating current density equaling to or greater than the critical current density. 